QBTS Filing
8-KFiling Date: Aug 5, 2026

D-Wave Quantum Inc. (QBTS) · Material Event (8-K) SEC Filing

Reg FD Disclosure, Financial Statements

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Reg FD DisclosureFinancial Statements
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Event Description

Item 7.01. Reg FD Disclosure
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D-Wave Quantum announced a peer-reviewed research breakthrough in Nature demonstrating a fast, high-fidelity two-qubit entangling gate for its superconducting dual-rail qubit architecture. Key results: ~99.9% fidelity, ~500ns gate times, and native hardware-level error detection that reduces overhead for fault-tolerant quantum computing. Simulations suggest the architecture could cut logical error rates by up to 10x per error-correction increment, substantially lowering the physical qubit count needed. Management cites this as validation of a practical path to commercial fault-tolerant quantum computing.

Original SEC Filing Text expand_more
Item 7.01 Regulation FD Disclosure. On August 5, 2026, D-Wave Quantum Inc. ( D-Wave ) announced a major research breakthrough advancing the path to practical, fault-tolerant gate-model quantum computing. Published in the peer-reviewed scientific journal Nature, the research demonstrates a fast, high-fidelity, two-qubit entangling gate that preserves the error-correction advantages of D-Wave s superconducting dual-rail qubit architecture. The results address one of the industry s most consequential challenges by reducing the immense quantum and classical hardware overhead typically required to detect and correct quantum errors as systems scale. The paper, An entangling gate for dual-rail erasure qubits, details a new two-qubit entangling gate, a fundamental building block of quantum computation, designed to support efficient quantum error correction. The research demonstrates approximately 99.9% fidelity during two-qubit operations, with fast gate times of about 500 nanoseconds, enabled by native hardware-level error detection. Leveraging these results, D-Wave simulations indicate its dual-rail architecture could reduce the logical error rate by as much as a factor of 10 for each increment in error correction, significantly reducing the physical qubit overhead required for fault-tolerant quantum computing. According to D-Wave s CEO, Dr. Alan Baratz, this research demonstrates that D-Wave s dual-rail architecture combines fast superconducting operations with high-fidelity performance while preserving native hardware-level error detection. D-Wave believes this work confirms that its path to commercial fault-tolerant quantum computing is practical and achievable. A copy of the press release is attached as Exhibit 99.1. The information in this
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Event Description

Item 9.01. Financial Statements
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D-Wave Quantum Inc. filed a Form 8-K with the SEC on August 5, 2026, reporting a material event. The filing includes a press release dated that same day (Exhibit 99.1) and the inline XBRL cover page. The report is signed by President & CEO Alan Baratz. The specific content of the press release isn't detailed in this excerpt, but the 8-K serves to publicly disclose the associated announcement.

Original SEC Filing Text expand_more
Item 9.01 Financial Statements and Exhibits . (d) Exhibits Exhibit No. Description 99.1 Press release, dated August 5, 2026. 104 Cover Page Interactive Data File (embedded within the Inline XBRL document). SIGNATURES Pursuant to the requirements of the Securities Exchange Act of 1934, the registrant has duly caused this report to be signed on its behalf by the undersigned hereunto duly authorized. Date: August 5, 2026 D-Wave Quantum Inc. By: /s/ Alan Baratz Name: Alan Baratz Title: President & Chief Executive Officer

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